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TE Connectivity plc
AI Compute · Physical AI
SignalWATCHReviewed 25 Oct 2026
AI Compute exposure in Physical AI.
TE Connectivity manufactures high-speed copper/optical cable assemblies used in data centers.
Catalysts
Q4 + full-year FY2026 results Oct 28, 2026 before market open, 8:30am ET call (TE Connectivity PR, Oct 7, 2026) Q4 FY2026 guidance: sales ~$5.25B (+11% reported and organic); Q3 FY2026 delivered record orders of $5.7B (+27% YoY) with Digital Data Networks revenue $813M (+34%) and Energy $516M (+34%) (Q3 FY2026 results / earnings call) Astrodyne TDI acquisition (~$1.4B cash, definitive agreement Jul 22, 2026) expected to close by end of calendar 2026 and reported in Industrial Solutions — excluded from current Q4 guidance (Q3 FY2026 results)
Invalidation
needs primary source validation — pending deep-dive research. Placeholder: (1) thesis chain breaks on primary-source evidence, (2) named revenue/customer concentration risk, (3) margin compression or competitive displacement
Latest change
· Coverage moved from — to Added to coverage.
Capital in context
Mapped funds and investors
Direct relationships supported by published evidence.
Reported holdings as-of
No sourced relationships mapped yet.
Disclosed investment history
No sourced relationships mapped yet.
Showing up to four relationships in each group. ETF weights describe the fund’s portfolio, not ownership of this company. Private investment history does not establish current ownership.
needs primary source validation — no X/Reddit signal yet
Lower-confidence snapshotTarget price: $257.98
Dated research targetMoat & position
- Evidence Grade
- Inferred
- Toll Road Tier
- Weak proxy
Timestamped research update
Deep research update
259 words · Updated 21 Oct 2026 · 6 sources
Research in development: this latest 259-word update is published for context while it is expanded toward Guide-level depth (1,000+ words).
TE Connectivity plc (None, CIK 0001385157) — US-listed company materially exposed to Active Electrical Cable (AEC).
Tokyo Electron Limited is a Japanese semiconductor production equipment supplier. The company designs, manufactures, sells, and services equipment used in fabricating semiconductors and flat panel displays. Its primary market is wafer fabrication equipment used by logic, foundry, and memory manufacturers.
Needs primary source validation
TEL’s required segment disclosure under U.S. or Japanese filing standards would typically show semiconductor production equipment as the dominant segment, with a smaller flat panel display equipment segment.
Revenue mix percentages: needs primary source validation
TEL likely monetizes through:
- capital equipment sales;
- spare parts and consumables;
- field service, upgrades, and installation;
- potentially certain software/process-control offerings.
Needs primary source validation
Needs primary source validation
The direct purchasers are semiconductor manufacturers: foundries, integrated device manufacturers, memory producers, and flat panel display manufacturers.
Needs primary source validation
I cannot identify top customers from primary filings because no filing was accessed.
Needs primary source validation
Likely customer classes include:
- leading-edge logic foundries;
- integrated device manufacturers;
- DRAM and NAND memory producers;
- specialty semiconductor manufacturers;
- flat panel display manufacturers.
Needs primary source validation
The economic buyer is typically the fab/process engineering organization, combined with procurement and manufacturing leadership. Qualification is likely controlled by integration and yield engineering teams.
Needs primary source validation
I cannot provide customer names from filings in this session.
Needs primary source validation
TE Connectivity manufactures high-speed copper/optical cable assemblies used in data centers.
- TE Connectivity manufactures high-speed copper/optical cable assemblies used in data centers. source
- TE Connectivity plc — SEC EDGAR company filings source
\[
\text{Qualification wafer cost} = 500 \times \$5{,}000 = \$2{,}500{,}000
\]
\[
\text{Engineering cost} = 2{,}000 \times \$300 = \$600{,}000
\]
\[
\text{Yield-loss cost} = 0.005 \times 3 \times 10{,}000 \times \$5{,}000 = \$750{,}000
\]
\[
\text{Total switching cost} = \$2{,}500{,}000 + \$600{,}000 + \$750{,}000 = \$3{,}850{,}000
\]
| Change | Revised yield-loss cost | Revised total |
|---|---|---|
| Yield loss increases from 0.5% to 1.0% | $1,500,000 | $4,600,000 |
| Qualification wafers increase from 500 to 1,000 | $750,000 yield loss unchanged | $6,350,000 |
| Wafer cost increases from $5,000 to $6,000 | $900,000 yield loss; $3,000,000 qualification | $4,500,000 |
This calculation is illustrative only. It is not sourced to TEL’s filings and cannot support a conviction score.
_Pending primary-source company deep-dive._
TEL’s known product categories, subject to verification, include:
- coater/developer systems used in photolithography;
- etch systems;
- thin-film deposition systems;
- cleaning systems;
- thermal processing systems;
- wafer probers for semiconductor test;
- flat panel display manufacturing equipment.
Needs primary source validation
The systems typically handle a semiconductor wafer through a controlled process environment: coating photoresist, developing exposed wafers, etching material, depositing films, cleaning surface residues, annealing, and probing electrical characteristics.
Needs primary source validation
Possible substitutes vary by process step. They may include alternative deposition techniques, alternative cleaning methods, alternative lithography process flows, or competing equipment from other semiconductor equipment suppliers.
Needs primary source validation
The likely barriers include:
- process qualification at customer fabs;
- long qualification cycles;
- installed-base lock-in;
- process recipe integration;
- semiconductor process knowledge;
- service and support infrastructure;
- precision, reliability, and contamination-control requirements.
Needs primary source validation
TEL’s pricing power cannot be assessed without verified gross margin, market share, customer concentration, and backlog data from primary filings.
Needs primary source validation
_Pending primary-source company deep-dive._
A bullish thesis on TEL would be contradicted or weakened if primary filings show:
If TEL’s semiconductor equipment gross margin is consistently below Applied Materials, Lam Research, and KLA after adjusting for service/spares mix, the pricing-power argument weakens.
If TEL’s growth depends on coater/developer or thermal systems, and competitor filings or third-party market data show share loss in those categories, the moat thesis weakens.
If filings show that more than 30–40% of revenue comes from one or two customers, revenue quality and pricing power may be weaker than a diversified installed-base thesis assumes.
If TEL’s semiconductor equipment revenue is heavily tied to NAND or DRAM capital-spending cycles, and the most recent filings show memory weakness persisting while logic/foundry demand strengthens, TEL may underperform peers with better end-market balance.
If R&D spending rises faster than revenue without corresponding share or margin gains, TEL may be spending more to maintain rather than extend competitive position.
If service and spares revenue is stagnant or declining as a share of total revenue, the recurring-revenue portion of the model is weaker than assumed.
If disclosed selling prices or gross margin trends show discounting to preserve volume, the pricing-power assumption fails.
INTACT (exposure surfaced from technology map; no capital allocation)
Primary and supporting material
Sources
6 sources preserved from the latest qualified research update.