Target
$166 → $165.84
Public companyResearch currentFresh
Lattice Semiconductor Corp.
Edge AI Silicon · Physical AI
SignalPOOLReviewed 25 Oct 2026
Edge AI Silicon exposure in Physical AI.
Low-power FPGAs for edge AI, industrial, and automotive — competes with AMD/Xilinx in small/mid-range FPGA. Mid-cap, profitable, fits Edge Compute thesis.
Catalysts
Q2 2026 earnings ~Aug 3 after close; MachXO5-NX TDQ post-quantum crypto FPGA launched; SEALSQ TPM+FPGA partnership for edge security; edge AI inference demand accelerating
Invalidation
1) AMD/Xilinx, Microchip and Gowin/Altera price-compete in small/mid-range FPGAs - Lattice's premium depends on the low-power niche holding. 2) Communications/industrial inventory correction persists and edge-AI inference demand fails to offset it. 3) Edge AI is early: MachXO5-NX TDQ and the SEALSQ security partnership must convert into design wins and revenue; if edge-AI designs stay in pilot, growth stalls. 4) Design-win-to-revenue latency of 12-24 months makes near-term revenue insensitive to headline design wins. 5) Gross margin depends on the mix shift to higher-margin products - a mix reversal compresses GM.
Latest change
· Conviction moved from 0 to 2.
Research history
See all LSCC changes Earlier changes
Capital in context
Mapped funds and investors
Direct relationships supported by published evidence.
Reported holdings as-of
No sourced relationships mapped yet.
Disclosed investment history
No sourced relationships mapped yet.
Showing up to four relationships in each group. ETF weights describe the fund’s portfolio, not ownership of this company. Private investment history does not establish current ownership.
ins-$3.0M · 13F 14+/10-×0.0 · short↓0.23
Current snapshotNeutral - No significant discussion found. [X/web search Sep 2026]
Lower-confidence snapshotTarget price: $164.51
Dated research targetMoat & position
- Evidence Grade
- Inferred
- Moat Durability
- Durable IP
- Toll Road Tier
- Strong proxy
Timestamped research update
Deep research update
1,402 words · Updated 19 Oct 2026 · 8 sources
Lattice Semiconductor Corp. — fabless designer of low-power FPGAs (iCE40, MachXO, Certus-NX, CrossLink, Nexus, Avant) for edge AI, industrial, communications, automotive, and defense. Self-described "low power programmable leader." After closing the $1.65B AMI acquisition (July 27, 2026), it also owns AMI's platform-firmware/BIOS/BMC franchise (SEC 8-K EX-99.1, 2026-08-04).
- GAAP net income $19.4M ($0.14 diluted); non-GAAP net income $74.4M ($0.53 diluted, +128% YoY).
- Revenue recovery: $120.2M (Q1 FY25) → $124.0M (Q2 FY25) → $133.3M (Q3 FY25) → $170.9M (Q1 FY26) → $201.1M (Q2 FY26). Two consecutive quarters +28.2% and +17.7% QoQ.
- New products >60% YoY, tracking to >25% of 2026 revenue, "led by AI-related server demand."
- Balance sheet: cash $173.3M, LT debt $150M (10-Q, 2026-08-04).
- monetization model: One-time silicon sales + software/IP licenses/services; no subscription/SaaS disclosed. Src: LSCC FY2023 10-K (latest verifiable; newer 10-K/10-Q UNKNOWN), Item 1, Note 2, acc. 0001437749-24-005154, sec.gov
- revenue mix: FY2023 product ~89%, license/services ~11% of $737.2M; end markets Industrial & Auto ~44%, Comms & Computing ~45%, Consumer ~11%. Src: same 10-K, Note 2/segment.
- who pays: OEMs/ODMs; distributors are primary fulfillment channel. Src: same 10-K, Item 1.
- margin_value_capture: FY2023 GAAP gross margin ~69%, operating margin ~30%; value in low-power FPGA silicon + proprietary software/IP. Src: same 10-K, MD&A.
- customer classes: Industrial Automation - OEMs, Data Center Operators, communications equipment OEMs, automotive OEMs, consumer device OEMs, distributors. Src: same 10-K, Item 1.
Q2 FY2026 (ended July 4, 2026) revenue $201.1M — a record, +62.2% YoY (vs $124.0M) and +17.7% QoQ (SEC 8-K EX-99.1). GAAP gross margin 70.3% (+190bps YoY); non-GAAP GM 71.7% (+240bps). Adjusted EBITDA $86.4M = 43.0% margin. Free cash flow $81.3M = 40.4% margin. TTM revenue ~$651M (picks_log); Q3 FY2026 guide $245–265M total incl. AMI implies a ~$1B annual run rate.
Low-power FPGAs for edge AI, industrial, and automotive — competes with AMD/Xilinx in small/mid-range FPGA. Mid-cap, profitable, fits Edge Compute thesis.
Physical AI pushes inference to the edge (robots, industrial vision, drones) where power/thermal budgets force on-device processing in <10W. Lattice is the #1 specialist in the low-power FPGA envelope that fits, and its companion-chip strategy (FPGA + BMC) attaches it to every AI server's board-management/security plane.
Q2 2026 earnings ~Aug 3 after close; MachXO5-NX TDQ post-quantum crypto FPGA launched; SEALSQ TPM+FPGA partnership for edge security; edge AI inference demand accelerating
- Power-envelope constraint: edge-AI endpoints need <10W (often <1W); high-end FPGAs (Xilinx Versal/Virtex) and GPUs draw tens-to-hundreds of watts. Lattice's milliwatt-to-low-single-digit-watt envelope is the physical filter that makes it the "only" low-power specialist — a structural niche, not a price war.
- R&D cost-of-moat: Q2 non-GAAP R&D $42.8M = 21.3% of revenue (GAAP $64.2M = 31.9% incl. stock comp) — ~$171M annualized, the toll to stay ahead of AMD/Intel in low-power. Defended: 70.3% GAAP GM, a ~20pt spread over non-GAAP R&D intensity.
- Switching-cost lock-in: for a $5–20 low-power FPGA, re-porting a design costs $100Ks–$1M in engineering + 12–24 months requalification — many multiples of the BOM, locking designs in for the product's life. This is why Lattice retains share despite AMD/Intel scale.
- AMI cost-of-moat vs. moat-defended: $1.65B for AMI's >$200M CY2026 revenue = ~8.25× revenue; AMI's ~75% GM / ~40% adj-EBITDA (~$80M) = ~20× EBITDA. Moat defended = the BIOS/BMC firmware franchise + Lattice's 70% GM FPGA = combined "secure management & control" platform (SEC 8-K EX-99.1).
\[
R_{2022} \times G_{2022} = 660.4 \times .679 = 448.4M
\]
\[
R_{2023} \times G_{2023} = 737.2 \times .697 = 513.8M
\]
\[
\Delta \text{Gross profit} = 513.8 - 448.4 = 65.4M
\]
\[
\Delta R = 737.2 - 660.4 = 76.8M
\]
\[
\text{Incremental gross margin} = 65.4 / 76.8 = 85.2\%
\]
Lattice controls the low-power programmable-logic niche at the "far edge" — the milliwatt-to-low-single-digit-watt FPGA envelope where on-device AI inference (vision, sensor fusion, always-on processing, robotics perception) must run, and where AMD/Xilinx and Intel/Altera devices are power-overkill. FPGA is a three-player oligopoly with no commodity substitute, and the design-toolchain + multi-year qualification cycle is the switching-cost moat. The July 2026 AMI acquisition extends this into a "secure management & control" platform (FPGA + BIOS/BMC firmware) for AI data centers.
- Three-player FPGA oligopoly: AMD/Xilinx ~50%+ overall, Intel/Altera ~25–35% (share-losing), Lattice #3 (single-digit-to-low-double-digit of broad TAM) but #1 in low-power small-form-factor devices (x_search, competitive commentary).
- Switching cost = RTL re-targeting + IP re-licensing + toolchain migration (Lattice Radiant/Diamond → Vivado/Quartus) + board re-spin + 12–24-month industrial/auto/defense requalification.
- Security moat: MachXO5-NX TDQ FPGA won the 2026 Cybersecurity Stars Award (Best Post-Quantum Cryptography) — crypto-agile, Root-of-Trust, SPDM (SEC 8-K EX-99.1).
- AMI's silicon-neutral BIOS/BMC firmware is an x86-firmware duopoly (AMI vs. Phoenix/Insyde), now inside Lattice.
- Bypass: 2 — customers CAN route to AMD/Xilinx or Intel/Altera (2 clear alternatives); in-house FPGA is infeasible (fab + toolchain).
- Concentration: 3 — FPGA is a 3-player oligopoly; low-power niche has no commodity substitute.
- Hyperscaler exposure: 2 — companion-chip + AMI deliberately court hyperscalers/OEMs/ODMs, but silicon-neutral firmware + switching costs mitigate verticalization.
- Composite 7/9 → STRONG PROXY.
- product_service: Low-power FPGAs/CPLDs, video ASSPs, software/IP for edge-to-cloud systems. Src: same 10-K, Item 1.
- technical function: Reconfigurable logic for control, bridging, I/O expansion, security, video/edge AI; low power/small form factor. Src: same 10-K, Item 1.
- why it is hard: proprietary low-power architecture, toolchain/IP, validation, long design-in stickiness; fabless TSMC supply. Src: same 10-K, Item 1/Risk Factors.
- substitutes: ASICs, ASSPs, MCUs/SoCs, other FPGA vendors (AMD/Xilinx, Intel/Altera, Microchip). Src: same 10-K, Item 1/Risk Factors.
- pricing power: MED — ~69% gross margin but cyclical, competitive, design-win dependent. Src: same 10-K, MD&A/Risk Factors.
Gross margins near 70% suggest meaningful pricing power relative to commodity semiconductors. But the fiscal evidence alone cannot prove Lattice can raise price without losing share; the margin could reflect product mix and software/IP amortization rather than pure hardware pricing power. The company has not disclosed a clean annual price/unit-volume mix table in the filings reviewed here. The safest source-bound statement is: Lattice’s high gross margin indicates low price-competitiveness in its core sockets, but it is a single-issuer primary source and is not cross-externally verified. If a competitor such as AMD or Altera used aggressive pricing in the mid-range Avant segment, Lattice’s incremental gross margin would compress quickly.
# 3. Who they sell to
needs primary source validation
- Stock is "dead-money" since flag: -10.57% (alpha -12.22pp vs SPY) — price has not yet reflected the fundamental recovery (disconfirming the crowd, not the thesis).
- Small absolute share: ~$651M TTM ≈ ~6–7% of the ~$9–10B FPGA TAM; AMD/Xilinx and Intel/Altera out-spend Lattice on R&D in absolute dollars.
- Revenue-decel flag on QoQ (28.2% → 17.7%): sequential growth is decelerating, though YoY is +62%.
- Hyperscaler verticalization risk: AMI's BMC/companion-chip attach courts hyperscalers who could build custom ASICs/manageability in-house; AMI's silicon-neutrality is the intended mitigation but is untested under the combined entity.
- GAAP R&D at 31.9% of revenue means GAAP operating margin is only ~11% — the profitability is a non-GAAP story.
- What is Lattice's share of the <5W low-power FPGA sub-segment specifically (needs a named analyst TAM model — not quoted in primary sources)?
- Does the AMI integration preserve the silicon-neutrality that underpins AMI's hyperscaler/OEM/ODM relationships (watch AMI unit retention through CY2026)?
- Post-Q3: does FPGA revenue decelerate further, or does AMI + companion-chip attach re-accelerate the run rate past $1B?
STRENGTHENED — record revenue +62% YoY, 70% GAAP GM, 40% FCF margin, record design wins, and the AMI platform (closed 7/27/26) all confirm the low-power-FPGA + secure-management-and-control thesis; the disconfirming signals (small absolute share, price lag, hyperscaler verticalization) temper but do not break it.
Primary and supporting material
Sources
8 sources preserved from the latest qualified research update.